Index: arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvLib.c =================================================================== --- arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvLib.c (revision 6) +++ arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvLib.c (working copy) @@ -832,6 +832,7 @@ *******************************************************************************/ MV_VOID mvBoardDebugLed(MV_U32 hexNum) { +#if 0 MV_U32 val[MV_GPP_MAX_GROUP] = {0}; MV_U32 mask[MV_GPP_MAX_GROUP] = {0}; MV_U32 digitMask; @@ -857,6 +858,7 @@ mvGppValueSet(gppGroup, mask[gppGroup], BOARD_INFO(boardId)->ledsPolarity == 0 ? val[gppGroup] : ~val[gppGroup]); } +#endif } /******************************************************************************* Index: arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.c =================================================================== --- arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.c (revision 6) +++ arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.c (working copy) @@ -300,13 +300,15 @@ MV_BOARD_TWSI_INFO rd88F6710InfoBoardTwsiDev[] = { /* {{MV_BOARD_TWSI_CLASS devClass, MV_U8 twsiDevAddr, MV_U8 twsiDevAddrType}} */ +#if 0 //ALPHA_CUSTOMIZE {BOARD_DEV_TWSI_SATR, 0x50, ADDR7_BIT}, +#endif }; MV_BOARD_MAC_INFO rd88F6710InfoBoardMacInfo[] = { /* {{MV_BOARD_MAC_SPEED boardMacSpeed, MV_U8 boardEthSmiAddr}} */ + {BOARD_MAC_SPEED_AUTO, 0x1, 0, 0}, {BOARD_MAC_SPEED_AUTO, 0x0, 0, 0}, - {BOARD_MAC_SPEED_1000M, 0x10, 0, 0}, }; MV_BOARD_SWITCH_INFO rd88F6710InfoBoardSwitchValue[] = { @@ -362,13 +364,14 @@ MV_BOARD_TDM_INFO rd88F6710Tdm3215[] = { {1} }; MV_BOARD_INFO rd88F6710Info = { - .boardName = "RD-88F6710", + .boardName = "RD-88F6710_Alpha", .enableModuleScan = MV_FALSE, .numBoardMppTypeValue = ARRSZ(rd88F6710InfoBoardModTypeInfo), .pBoardModTypeValue = rd88F6710InfoBoardModTypeInfo, .numBoardMppConfigValue = ARRSZ(rd88F6710InfoBoardMppConfigValue), .pBoardMppConfigValue = rd88F6710InfoBoardMppConfigValue, - .intsGppMaskLow = BIT31, /* for Switch link interrupt */ + //.intsGppMaskLow = BIT31, /* for Switch link interrupt */ + .intsGppMaskLow = NULL, .intsGppMaskMid = 0, .intsGppMaskHigh = 0, .numBoardDeviceIf = ARRSZ(rd88F6710InfoBoardDeCsInfo), @@ -380,7 +383,8 @@ .numBoardGppInfo = ARRSZ(rd88F6710InfoBoardGppInfo), .pBoardGppInfo = rd88F6710InfoBoardGppInfo, .activeLedsNumber = ARRSZ(rd88F6710InfoBoardDebugLedIf), - .pLedGppPin = rd88F6710InfoBoardDebugLedIf, +// .pLedGppPin = rd88F6710InfoBoardDebugLedIf, + .pLedGppPin = NULL, .ledsPolarity = 0, /* PMU Power */ @@ -399,8 +403,10 @@ .gppPolarityValHigh = RD_88F6710_GPP_POL_HIGH, /* External Switch Configuration */ - .pSwitchInfo = rd88F6710InfoBoardSwitchValue, - .switchInfoNum = ARRSZ(rd88F6710InfoBoardSwitchValue), + .pSwitchInfo = NULL, + .switchInfoNum = NULL, +// .pSwitchInfo = rd88F6710InfoBoardSwitchValue, +// .switchInfoNum = ARRSZ(rd88F6710InfoBoardSwitchValue), /* TDM configuration */ /* We hold a different configuration array for each possible slic that @@ -410,9 +416,15 @@ ** For RD and Customers boards we only need to initialize a single ** entry of the arrays below, and set the boardTdmInfoIndex to 0. */ - .numBoardTdmInfo = {2, 6, 1}, + //.numBoardTdmInfo = {2, 6, 1}, + .numBoardTdmInfo = NULL, + .pBoardTdmInt2CsInfo = NULL, + .boardTdmInfoIndex = NULL, + +/* .numBoardTdmInfo = {2, 6, 1}, .pBoardTdmInt2CsInfo = {rd88F6710Tdm880, rd88F6710Tdm792, rd88F6710Tdm3215}, .boardTdmInfoIndex = -1, +*/ /* NOR init params */ .norFlashReadParams = RD_88F6710_BOARD_NOR_READ_PARAMS, Index: arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.h =================================================================== --- arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.h (revision 6) +++ arch/arm/mach-armada370/armada_370_family/boardEnv/mvBoardEnvSpec.h (working copy) @@ -377,15 +377,15 @@ /*******************/ /* RD_88F6710 */ /*******************/ -#define RD_88F6710_MPP0_7 0x00011111 -#define RD_88F6710_MPP8_15 0x33333030 -#define RD_88F6710_MPP16_23 0x22222110 -#define RD_88F6710_MPP24_31 0x02222222 -#define RD_88F6710_MPP32_39 0x11111110 -#define RD_88F6710_MPP40_47 0x01111111 -#define RD_88F6710_MPP48_55 0x33344444 -#define RD_88F6710_MPP56_63 0x03555556 -#define RD_88F6710_MPP64_67 0x00000000 +#define RD_88F6710_MPP0_7 0x00201111 //MPP control REG0 0x18000, BLUE_ADD +#define RD_88F6710_MPP8_15 0x00000000 //MPP control REG1 0x18004, BLUE_ADD +#define RD_88F6710_MPP16_23 0x22222110 //MPP control REG2 0x18008, BLUE_ADD +#define RD_88F6710_MPP24_31 0x02222222 //MPP control REG3 0x1800c, BLUE_ADD +#define RD_88F6710_MPP32_39 0x11111110 //MPP control REG4 0x18010, BLUE_ADD +#define RD_88F6710_MPP40_47 0x01111111 //MPP control REG5 0x18014, BLUE_ADD +#define RD_88F6710_MPP48_55 0x40000000 //MPP control REG6 0x18018, BLUE_ADD +#define RD_88F6710_MPP56_63 0x00020040 //MPP control REG7 0x1801c, BLUE_ADD +#define RD_88F6710_MPP64_67 0x00000000 //MPP control REG8 0x18020, BLUE_ADD /* GPPs ARMADA370 MPP# NAME IN/OUT @@ -403,15 +403,15 @@ 65 Ext HDD Power OUT(0) */ -#define RD_88F6710_GPP_OUT_ENA_LOW (~(BIT5 | BIT8)) -#define RD_88F6710_GPP_OUT_ENA_MID (~(BIT0 | BIT15 | BIT31)) -#define RD_88F6710_GPP_OUT_ENA_HIGH (~(BIT0 | BIT1)) +#define RD_88F6710_GPP_OUT_ENA_LOW 0x7FFC000F //GPIO dataout enable REG0 0x18104 +#define RD_88F6710_GPP_OUT_ENA_MID 0x980C7FFE //GPIO dataout enable REG0 0x18144 +#define RD_88F6710_GPP_OUT_ENA_HIGH 0xFFFFFFFF //GPIO dataout enable REG0 0x18184 -#define RD_88F6710_GPP_OUT_VAL_LOW (BIT5 | BIT8) -#define RD_88F6710_GPP_OUT_VAL_MID 0x0 -#define RD_88F6710_GPP_OUT_VAL_HIGH 0x0 +#define RD_88F6710_GPP_OUT_VAL_LOW 0x00000800 //GPIO dataout REG0 0x18100 +#define RD_88F6710_GPP_OUT_VAL_MID 0x01400000 //GPIO dataout REG1 0x18140 +#define RD_88F6710_GPP_OUT_VAL_HIGH 0x0 //GPIO dataout REG2 0x18180 -#define RD_88F6710_GPP_POL_LOW BIT31 +#define RD_88F6710_GPP_POL_LOW 0x0 #define RD_88F6710_GPP_POL_MID 0x0 #define RD_88F6710_GPP_POL_HIGH 0x0 Index: arch/arm/mach-armada370/core.c =================================================================== --- arch/arm/mach-armada370/core.c (revision 6) +++ arch/arm/mach-armada370/core.c (working copy) @@ -798,19 +798,40 @@ static struct mtd_partition nand_parts_info[] = { { - .name = "UBoot", + .name = "u-Boot", .offset = 0, - .size = 1 * SZ_1M + .size = 5 * SZ_1M }, { - .name = "UImage", - .offset = MTDPART_OFS_APPEND, - .size = 4 * SZ_1M }, + .name = "uImage", + .offset = MTDPART_OFS_APPEND, + .size = 5 * SZ_1M + }, { - .name = "Root", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL + .name = "ramdisk", + .offset = MTDPART_OFS_APPEND, + .size = 5 * SZ_1M }, + { + .name = "image.cfs", + .offset = MTDPART_OFS_APPEND, + .size = 201 * SZ_1M + }, + { + .name = "rescue firmware", + .offset = 221 * 1024 * 1024, + .size = 15 * SZ_1M + }, + { + .name = "config", + .offset = 236 * 1024 * 1024, + .size = 20 * SZ_1M + }, + { + .name = "reserve", + .offset = 216 * 1024 * 1024, + .size = 5 * SZ_1M + }, }; static struct nfc_platform_data axp_nfc_data = { @@ -1265,7 +1286,7 @@ } /* Set configuration according to bit mask passed from U-Boot */ - mvBoardBitMaskConfigSet(bit_mask_config); + //mvBoardBitMaskConfigSet(bit_mask_config); //alpha.jack.20131104- armadaxp_setup_cpu_mbus(); Index: arch/arm/mach-armada370/leds.c =================================================================== --- arch/arm/mach-armada370/leds.c (revision 6) +++ arch/arm/mach-armada370/leds.c (working copy) @@ -29,6 +29,7 @@ void mv_leds_hearbeat(void) { + return; u32 sec = jiffies_to_msecs(jiffies - last_jiffies) / 1000; if (!sec) Index: arch/arm/mach-armada370/synology-gpio.c =================================================================== --- arch/arm/mach-armada370/synology-gpio.c (revision 7) +++ arch/arm/mach-armada370/synology-gpio.c (working copy) @@ -205,35 +205,28 @@ int fail_led; int active = 0; //note: led is low active -#ifdef MY_ABC_HERE - if (syno_is_hw_version(HW_RS214v10)) { - // RS214 led is high active - active = 1; - } -#endif - if (1 == index) WARN_ON(GPIO_UNDEF == generic_gpio.soc_sata_led.hdd1_fail_led); else if (2 == index) WARN_ON(GPIO_UNDEF == generic_gpio.soc_sata_led.hdd2_fail_led); - if (SYNO_RS214_ID == mvBoardIdGet()) { - /* RS214 disk LED is HIGH active, so we need invert the active indication */ - MV_REG_WRITE(MV_SATA_REGS_OFFSET + 0x2c, 0xc); - } else { - MV_REG_WRITE(MV_SATA_REGS_OFFSET + 0x2c, 0x4); - } + if (SYNO_RS214_ID == mvBoardIdGet()) { + /* RS214 disk LED is HIGH active, so we need invert the active indication */ + MV_REG_WRITE(MV_SATA_REGS_OFFSET + 0x2c, 0xc); + } else { + MV_REG_WRITE(MV_SATA_REGS_OFFSET + 0x2c, 0x4); + } /* assign pin info according to hdd */ switch (index) { case 1: - mpp_pin = 60; + mpp_pin = 51; mode_sata_present = 0x03; mode_gpio = 0; fail_led = generic_gpio.soc_sata_led.hdd1_fail_led; break; case 2: - mpp_pin = 48; + mpp_pin = 50; mode_sata_present = 0x04; mode_gpio = 0; fail_led = generic_gpio.soc_sata_led.hdd2_fail_led; @@ -326,9 +319,9 @@ gpio_set_value(pin1, bit1); gpio_set_value(pin2, bit2); - ret = 0; + ret = 0; END: - return ret; + return ret; } int @@ -550,7 +543,7 @@ MV_U8 SYNOArmadaIsBoardNeedPowerUpHDD(MV_U32 disk_id) { u8 ret = 0; - MV_U32 boardId = mvBoardIdGet(); + MV_U32 boardId = SYNO_DS213j_ID; struct disk_info *table = NULL; int table_cnt = 0; int def_max_disk = 0; @@ -662,6 +655,21 @@ MPP[64] 0x0 FAN Control Middle Out MPP[65] 0x0 FAN Control Min Out */ + +extern void (*syno_power_off_indicator)(void); +static void us3_power_off(void) +{ + /* since US3 has no microP to power off, + * we need an indicator for system halt */ + printk("Set US3 shutdown indicator\n"); + /* set power green off */ + gpio_set_value(42, 1); + SYNO_ARMADA_GPIO_BLINK(42, 0); + /* set power orange on */ + gpio_set_value(43, 0); + SYNO_ARMADA_GPIO_BLINK(43, 0); +} + static void Armada_370_213j_GPIO_init(SYNO_ARMADA_GENERIC_GPIO *global_gpio) { @@ -680,26 +688,26 @@ .hdd_led_mask = GPIO_UNDEF, }, .soc_sata_led = { - .hdd2_fail_led = 32, - .hdd1_fail_led = 31, + .hdd2_fail_led = 52, + .hdd1_fail_led = 53, }, .model = { - .model_id_0 = 55, - .model_id_1 = 56, - .model_id_2 = 57, - .model_id_3 = 58, + .model_id_0 = GPIO_UNDEF, + .model_id_1 = GPIO_UNDEF, + .model_id_2 = GPIO_UNDEF, + .model_id_3 = GPIO_UNDEF, }, .fan = { - .fan_1 = 63, - .fan_2 = 64, - .fan_3 = 65, - .fan_fail = 38, + .fan_1 = 8, + .fan_2 = 32, + .fan_3 = 6, + .fan_fail = GPIO_UNDEF, .fan_fail_2 = GPIO_UNDEF, .fan_fail_3 = GPIO_UNDEF, }, .hdd_pm = { - .hdd1_pm = 37, - .hdd2_pm = 62, + .hdd1_pm = 55, + .hdd2_pm = 54, .hdd3_pm = GPIO_UNDEF, .hdd4_pm = GPIO_UNDEF, }, @@ -713,31 +721,18 @@ .inter_lock = GPIO_UNDEF, }, .status = { - .power_led = GPIO_UNDEF, - .alarm_led = GPIO_UNDEF, + .power_led = 61, + .alarm_led = 60, }, .usb = { - .usb_power = GPIO_UNDEF, + .usb_power = 13, }, }; *global_gpio = gpio_213j; + syno_power_off_indicator = us3_power_off; } -extern void (*syno_power_off_indicator)(void); -static void us3_power_off(void) -{ - /* since US3 has no microP to power off, - * we need an indicator for system halt */ - printk("Set US3 shutdown indicator\n"); - /* set power green off */ - gpio_set_value(42, 1); - SYNO_ARMADA_GPIO_BLINK(42, 0); - /* set power orange on */ - gpio_set_value(43, 0); - SYNO_ARMADA_GPIO_BLINK(43, 0); -} - static void Armada_370_us3_GPIO_init(SYNO_ARMADA_GENERIC_GPIO *global_gpio) { @@ -1176,7 +1171,7 @@ } void synology_gpio_init(void) { - MV_U32 boardId = mvBoardIdGet(); + MV_U32 boardId = SYNO_DS213j_ID; switch(boardId) { case SYNO_DS213j_ID: Index: arch/arm/plat-armada/mv_drivers_lsp/mv_mtd/nand_nfc.c =================================================================== --- arch/arm/plat-armada/mv_drivers_lsp/mv_mtd/nand_nfc.c (revision 6) +++ arch/arm/plat-armada/mv_drivers_lsp/mv_mtd/nand_nfc.c (working copy) @@ -1435,7 +1435,7 @@ nand->bbt_td = &mvbbt_main_descr; nand->bbt_md = &mvbbt_mirror_descr; nand->badblock_pattern = BB_INFO; - nand->chip_delay = 25; + nand->chip_delay = 40; } static int orion_nfc_probe(struct platform_device *pdev) Index: arch/arm/plat-armada/mv_hal/nfc/mvNfc.c =================================================================== --- arch/arm/plat-armada/mv_hal/nfc/mvNfc.c (revision 10) +++ arch/arm/plat-armada/mv_hal/nfc/mvNfc.c (working copy) @@ -215,6 +215,172 @@ /* Defined Flash Types */ MV_NFC_FLASH_INFO flashDeviceInfo[] = { +//=====================BLUE_ADD=========================== + { /* Hynix 1Gb, H27U1G8F2B */ + .tADL = 70, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 25, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 15, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25000, /* tR = data transfer from cell to register */ + .tWHR = 60, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 1024, /* Number of blocks/sectors in the flash */ + .id = 0xF1AD, /* Device ID 0xDevice,Vendor */ + .model = "Hynix 1Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + { /* Efeon 1Gb, EN27LN1G08-25TIP */ + .tADL = 100, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 25, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 10, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25000, /* tR = data transfer from cell to register */ + .tWHR = 80, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 1024, /* Number of blocks/sectors in the flash */ + .id = 0xF192, /* Device ID 0xDevice,Vendor */ + .model = "Efeon 1Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + { /* Hynix 1Gb, H27U1G8F2B */ + .tADL = 0, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 30, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 10, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25, /* tR = data transfer from cell to register */ + .tWHR = 80, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 1024, /* Number of blocks/sectors in the flash */ + .id = 0xA1AD, /* Device ID 0xDevice,Vendor */ + .model = "Hynix 1Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + + { /* Hynix 1Gb, H27U1G8F2B */ + .tADL = 0, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 30, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 10, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25, /* tR = data transfer from cell to register */ + .tWHR = 80, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 1024, /* Number of blocks/sectors in the flash */ + .id = 0x2521, /* Device ID 0xDevice,Vendor */ + .model = "Hynix 1Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + + { /* Hynix 1Gb, H27U1G8F2B */ + .tADL = 0, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 30, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 10, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25, /* tR = data transfer from cell to register */ + .tWHR = 80, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 1024, /* Number of blocks/sectors in the flash */ + .id = 0x2121, /* Device ID 0xDevice,Vendor */ + .model = "Hynix 1Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + + { /* Hynix 2Gb, H27U2G8F2C */ + .tADL = 70, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 25, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 15, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25000, /* tR = data transfer from cell to register */ + .tWHR = 60, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 100, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 2048, /* Number of blocks/sectors in the flash */ + .id = 0xDAAD, /* Device ID 0xDevice,Vendor */ + .model = "Hynix 2Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + { /* TOSHIBA 2Gb, TC58NVG1S3ETA00 */ + .tADL = 70, /* tADL, Address to write data delay */ + .tCH = 5, /* tCH, Enable signal hold time */ + .tCS = 20, /* tCS, Enable signal setup time */ + .tWC = 25, /* tWC, ND_nWE cycle duration */ + .tWH = 10, /* tWH, ND_nWE high duration */ + .tWP = 12, /* tWP, ND_nWE pulse time */ + .tRC = 25, /* tWC, ND_nRE cycle duration */ + .tRH = 22, /* tRH, ND_nRE high duration */ + .tRP = 12, /* tRP, ND_nRE pulse width */ + .tR = 25, /* tR = data transfer from cell to register */ + .tWHR = 60, /* tWHR, ND_nWE high to ND_nRE low delay for status read */ + .tAR = 10, /* tAR, ND_ALE low to ND_nRE low delay */ + .tRHW = 30, /* tRHW, ND_nRE high to ND_nWE low delay */ + .pgPrBlk = 64, /* Pages per block - detected */ + .pgSz = 2048, /* Page size */ + .oobSz = 64, /* Spare size */ + .blkNum = 2048, /* Number of blocks/sectors in the flash */ + .id = 0xDA98, /* Device ID 0xDevice,Vendor */ + .model = "TOSHIBA 2Gb 8bit", + .bb_page = 0, /* Manufacturer Bad block marking page in block */ + .flags = NFC_CLOCK_UPSCALE_200M + }, + //=====================BLUE_ADD================================= { /* ST 1Gb */ .tADL = 100, /* tADL, Address to write data delay */ .tCH = 5, /* tCH, Enable signal hold time */ @@ -683,6 +849,7 @@ /* Read the device ID */ ret = mvNfcReadIdNative(nfcCtrl->currCs, &read_id); + printk("flash read_id : %lx\n",read_id); //alpha.jack.20130129+ if (ret != MV_OK) return ret; @@ -689,6 +856,7 @@ /* Look for device ID in knwon device table */ for (i = 0; i < (sizeof(flashDeviceInfo) / sizeof(MV_NFC_FLASH_INFO)); i++) { if (flashDeviceInfo[i].id == read_id) + udelay(1000); //alpha.jack.20130129+ break; } if (i == (sizeof(flashDeviceInfo) / sizeof(MV_NFC_FLASH_INFO))) Index: drivers/mtd/mtdchar.c =================================================================== --- drivers/mtd/mtdchar.c (revision 6) +++ drivers/mtd/mtdchar.c (working copy) @@ -1099,6 +1099,7 @@ #endif #ifdef MY_ABC_HERE +#else case MEMMODIFYPARTINFO: { unsigned long adrs[2];